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cmos, 1.8 v to 5.5 v/2.5 v, 3 low voltage 4-/8-channel multiplexers adg708/adg709 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2000C2009 analog devices, inc. all rights reserved. features 1.8 v to 5.5 v single supply 2.5 v dual supply 3 on resistance 0.75 on resistance flatness 100 pa leakage currents 14 ns switching times single 8-to-1 multiplexer adg708 differential 4-to-1 multiplexer adg709 16-lead tssop package low power consumption ttl-/cmos-compatible inputs applications data acquisition systems communication systems relay replacement audio and video switching battery-powered systems general description the adg708/adg709 are low voltage, cmos analog multiplexers comprising eight single channels and four differential channels, respectively. the adg708 switches one of eight inputs (s1 to s8) to a common output, d, as determined by the 3-bit binary address lines a0, a1, and a2. the adg709 switches one of four differential inputs to a common differential output as determined by the 2-bit binary address lines a0 and a1. an en input on both devices is used to enable or disable the device. when disabled, all channels are switched off. low power consumption and an operating supply range of 1.8 v to 5.5 v make the adg708/adg709 ideal for battery- powered, portable instruments. all channels exhibit break- before-make switching action preventing momentary shorting when switching channels. these switches are designed on an enhanced submicron process that provides low power dissipation yet gives high switching speed, very low on resistance, and leakage currents. on resistance is in the region of a few ohms and is closely matched between switches and very flat over the full signal range. these parts can operate equally well as either multiplexers or demultiplexers and have an input signal range that extends to the supplies. functional block diagrams s 1 s 8 a0 d a1 a2 adg708 en 1 of 8 decoder 00041-001 figure 1. s1a a0 da s4a s1b s4b db en adg709 1 of 4 decoder a1 00041-002 figure 2. product highlights 1. single-/dual-supply operation. the adg708/adg709 are fully specified and guaranteed with 3 v and 5 v single-supply and 2.5 v dual-supply rails. 2. low r on (3 typical). 3. low power consumption (<0.01 w). 4. guaranteed break-before-make switching action. 5. small 16-lead tssop package. the adg708/adg709 are available in a 16-lead tssop.
adg708/adg709 rev. c | page 2 of 20 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagrams ............................................................. 1 ? product highlights ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? dual supply ................................................................................... 7 ? absolute maximum ratings ............................................................ 9 ? esd caution .................................................................................. 9 ? pin configurations and function descriptions ......................... 10 ? truth tables................................................................................. 11 ? typical performance characteristics ........................................... 12 ? test circuits ..................................................................................... 15 ? terminology .................................................................................... 18 ? applications information .............................................................. 19 ? power supply sequencing ......................................................... 19 ? outline dimensions ....................................................................... 20 ? ordering guide .......................................................................... 20 ? revision history 4/09?rev. b to rev. c changes to table 1 ............................................................................ 3 changes to table 2 ............................................................................ 5 changes to table 3 ............................................................................ 7 moved truth tables section .......................................................... 11 changes to figure 7, figure 8, and figure 9................................ 12 changes to figure 13 and figure 14 ............................................. 13 moved terminology section ......................................................... 18 changes to ordering guide .......................................................... 20 8/06?rev. a to rev. b updated format .................................................................. universal changes to absolute maximum ratings section ......................... 9 added table 7 and table 8 ............................................................ 10 updated outline dimensions ....................................................... 18 changes to ordering guide .......................................................... 18 4/02rev. 0 to rev. a edits to features and product highlights ..................................... 1 change to specifications .............................................................. 2C4 edits to absolute maximum ratings notes .................................. 5 edits to tpcs 2, 5, 6C9, 11, and 15 ............................................. 7C9 edits to test circuits 9 and 10 ...................................................... 11 addition of test circuit 11 ............................................................ 11 10/00revision 0: initial version
adg708/adg709 rev. c | page 3 of 20 specifications v dd = 5 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 1. b version c version parameter +25c ?40c to +85c ?40c to +125c +25c ?40c to +85c ?40c to +125c unit test conditions/ comments analog switch analog signal range 0 v to v dd 0 v to v dd 0 v to v dd v on resistance (r on ) 3 3 typ v s = 0 v to v dd , i ds = 10 ma; see figure 20 4.5 5 7 4.5 5 7 max on resistance match between channels (r on ) 0.4 0.4 typ 0.8 1.5 0.8 1.5 max v s = 0 v to v dd , i ds = 10 ma on resistance flatness (r flat (on) ) 0.75 0.75 typ v s = 0 v to v dd , i ds = 10 ma 1.2 1.65 1.2 1.65 max leakage currents v dd = 5.5 v source off leakage, i s (off) 0.01 0.01 na typ v d = 4.5 v/1 v, v s = 1 v/4.5 v; see figure 21 20 20 0.1 0.3 1 na max drain off leakage, i d (off ) 0.01 0.01 na typ v d = 4.5 v/1 v, v s = 1 v/4.5 v; see figure 22 20 20 0.1 0.75 6 na max channel on leakage, i d , i s (on) 0.01 0.01 na typ v d = v s = 1 v or 4.5 v; see figure 23 20 20 0.1 0.75 6 na max digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.1 0.1 a max digital input capacitance, c in 2 2 pf typ dynamic characteristics 1 t transition 14 14 ns typ r l = 300 , c l = 35 pf; see figure 24 25 25 25 25 ns max v s1 = 3 v/0 v, v s8 = 0 v/3 v break-before-make time delay, t open 8 8 ns typ r l = 300 , c l = 35 pf 1 1 1 1 ns min v s = 3 v; see figure 25 t on (en) 14 14 ns typ r l = 300 , c l = 35 pf 25 25 25 25 ns max v s = 3 v; see figure 26 t off (en) 7 7 ns typ r l = 300 , c l = 35 pf 12 12 12 12 ns max v s = 3 v; see figure 26 charge injection 3 3 pc typ v s = 2.5 v, r s = 0 , c l = 1 nf; see figure 27 off isolation ?60 ?60 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?80 ?80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 28
adg708/adg709 rev. c | page 4 of 20 b version c version parameter +25c ?40c to +85c ?40c to +125c +25c ?40c to +85c ?40c to +125c unit test conditions/ comments channel-to-channel crosstalk ?60 ?60 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?80 ?80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 ?3 db bandwidth 55 55 mhz typ r l = 50 , c l = 5 pf; see figure 30 c s (off ) 13 13 pf typ f = 1 mhz c d (off) adg708 85 85 pf typ f = 1 mhz adg709 42 42 pf typ f = 1 mhz c d , c s (on) adg708 96 96 pf typ f = 1 mhz adg709 48 48 pf typ f = 1 mhz power requirements v dd = 5.5 v i dd 0.001 0.001 a typ digital inputs = 0 v or 5.5 v 1.0 1.0 1.0 1.0 a max 1 guaranteed by design, not subject to production test.
adg708/adg709 rev. c | page 5 of 20 v dd = 3 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 2. b version c version parameter +25c ?40c to +85c ?40c to +125c +25c ?40c to +85c ?40c to +125c unit test conditions/ comments analog switch analog signal range 0 v to v dd 0 v to v dd v on resistance (r on ) 8 8 typ v s = 0 v to v dd , i ds = 10 ma; see figure 20 11 12 14 11 12 14 max on resistance match between channels (r on ) 0.4 0.4 typ v s = 0 v to v dd , i ds = 10 ma 1.2 2 1.2 2 max leakage currents v dd = 3.3 v source off leakage, i s (off ) 0.01 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v; see figure 21 20 20 0.1 0.3 1 na max drain off leakage, i d (off ) 0.01 0.01 na typ v s = 3 v/1 v, v d = 1 v/3 v; see figure 22 20 20 0.1 0.75 6 na max channel on leakage, i d , i s (on) 0.01 0.01 na typ v s = v d = 1 v or 3 v; see figure 23 20 20 0.1 0.75 6 na max digital inputs input high voltage, v inh 2.0 2.0 v min input low voltage, v inl 0.8 0.8 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.1 0.1 a max digital input capacitance, c in 2 2 pf typ dynamic characteristics 1 t transition 18 18 ns typ r l = 300 , c l = 35 pf; see figure 24 30 30 30 30 ns max v s1 = 2 v/0 v, v s2 = 0 v/2 v break-before-make time delay, t open 8 8 ns typ r l = 300 , c l = 35 pf 1 1 1 1 ns min v s = 2 v; see figure 25 t on (en) 18 18 ns typ r l = 300 , c l = 35 pf 30 30 30 30 ns max v s = 2 v; see figure 26 t off (en) 8 8 ns typ r l = 300 , c l = 35 pf 15 15 15 15 ns max v s = 2 v; see figure 26 charge injection 3 3 pc typ v s = 1.5 v, r s = 0 , c l = 1 nf; see figure 27 off isolation ?60 ?60 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?80 ?80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 28 channel-to-channel crosstalk ?60 ?60 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?80 ?80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 ?3 db bandwidth 55 55 mhz typ r l = 50 , c l = 5 pf; see figure 30
adg708/adg709 rev. c | page 6 of 20 b version c version parameter +25c ?40c to +85c ?40c to +125c +25c ?40c to +85c ?40c to +125c unit test conditions/ comments c s (off ) 13 13 pf typ f = 1 mhz c d (off) adg708 85 85 pf typ f = 1 mhz adg709 42 42 pf typ f = 1 mhz c d , c s (on) adg708 96 96 pf typ f = 1 mhz adg709 48 48 pf typ f = 1 mhz power requirements v dd = 3.3 v i dd 0.001 0.001 a typ digital inputs = 0 v or 3.3 v 1.0 1.0 1.0 1.0 a max 1 guaranteed by design, not subject to production test.
adg708/adg709 rev. c | page 7 of 20 dual supply v dd = 2.5 v 10%, v ss = C2.5 v 10%, gnd = 0 v, unless otherwise noted. table 3. b version c version parameter +25c ?40c to +85c ?40c to +125c +25c ?40c to +85c ?40c to +125c unit test conditions/ comments analog switch analog signal range v ss to v dd v ss to v dd v on resistance (r on ) 2.5 2.5 typ v s = v ss to v dd , i ds = 10 ma; see figure 20 4.5 5 7 4.5 5 7 max on resistance match between channels (r on ) 0.4 0.4 typ 0.8 1.5 0.8 1.5 max v s = v ss to v dd , i ds = 10 ma on resistance flatness (r flat (on) ) 0.6 0.6 typ v s = v ss to v dd , i ds = 10 ma 1.0 1.65 1.0 1.65 max leakage currents v dd = +2.75 v, v ss = ?2.75 v source off leakage, i s (off ) 0.01 0.01 na typ v s = +2.25 v/?1.25 v, v d = ?1.25 v/+2.25 v; see figure 21 20 20 0.1 0.3 1 na max drain off leakage, i d (off ) 0.01 0.01 na typ v s = +2.25 v/?1.25 v, v d = ?1.25 v/+2.25 v; see figure 22 20 20 0.1 0.75 6 na max channel on leakage, i d , i s (on) 0.01 0.01 na typ v s = v d = +2.25 v/?1.25 v; see figure 23 20 20 0.1 0.75 6 na max digital inputs input high voltage, v inh 1.7 1.7 v min input low voltage, v inl 0.7 0.7 v max input current i inl or i inh 0.005 0.005 a typ v in = v inl or v inh 0.1 0.1 a max digital input capacitance, c in 2 2 pf typ dynamic characteristics 1 t transition 14 14 ns typ r l = 300 , c l = 35 pf; see figure 24 25 25 25 25 ns max v s = 1.5 v/0 v; see figure 24 break-before-make time delay, t open 8 8 ns typ r l = 300 , c l = 35 pf 1 1 1 1 ns min v s = 1.5 v; see figure 25 t on (en) 14 14 ns typ r l = 300 , c l = 35 pf 25 25 25 25 ns max v s = 1.5 v; see figure 26 t off (en) 8 8 ns typ r l = 300 , c l = 35 pf 15 15 15 15 ns max v s = 1.5 v; see figure 26 charge injection 3 3 pc typ v s = 0 v, r s = 0 , c l = 1 nf; see figure 27 off isolation ?60 ?60 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?80 ?80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 28
adg708/adg709 rev. c | page 8 of 20 b version c version parameter +25c ?40c to +85c ?40c to +125c +25c ?40c to +85c ?40c to +125c unit test conditions/ comments channel-to-channel crosstalk ?60 ?60 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?80 ?80 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 ?3 db bandwidth 55 55 mhz typ r l = 50 , c l = 5 pf; see figure 30 c s (off ) 13 13 pf typ f = 1 mhz c d (off) adg708 85 85 pf typ f = 1 mhz adg709 42 42 pf typ f = 1 mhz c d , c s (on) adg708 96 96 pf typ f = 1 mhz adg709 48 48 pf typ f = 1 mhz power requirements v dd = 2.75 v i dd 0.001 0.001 a typ digital inputs = 0 v or 2.75 v 1.0 1.0 1.0 1.0 a max i ss 0.001 0.001 a typ v ss = ?2.75 v 1.0 1.0 1.0 1.0 a max digital inputs = 0 v or 2.75 v 1 guaranteed by design not subject to production test.
adg708/adg709 rev. c | page 9 of 20 absolute maximum ratings t a = 25c, unless otherwise noted. table 4. parameter rating v dd to v ss 7 v v dd to gnd ?0.3 v to +7 v v ss to gnd +0.3 v to ?3.5 v analog inputs 1 v ss ? 0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first digital inputs 1 ?0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first peak current, s or d (pulsed at 1 ms, 10% duty cycle maximum) 100 ma continuous current, s or d 30 ma operating temperature industrial temperature range ?40c to +125c storage temperature range ?65c to +150c junction temperature 150c tssop package, power dissipation 432 mw ja thermal impedance 150.4c/w jc thermal impedance 27.6c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c 1 overvoltages at a, en, s, or d are clamped by internal codes. current should be limited to the maximum ratings given. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating can be applied at any one time. esd caution
adg708/adg709 rev. c | page 10 of 20 pin configurations and function descriptions a0 en s2 s3 s4 v ss s1 d a1 a2 s5 s6 s7 gnd v dd s8 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 adg708 top view (not to scale) 00041-003 figure 3. adg708 pin configuration a0 en s2 a s3 a s4 a v ss s1 a da a1 gnd s2b s3b s4b v dd s1b db 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 adg709 top view (not to scale) 00041-004 figure 4. adg709 pin configuration table 5. adg708 pin function descriptions pin no. neonic description 1 a0 digital input. controls the configuration of the switch, as shown in the truth table (see table 7 ). 2 en digital input. controls the configuration of the switch, as shown in the truth table (see table 7 ). 3 v ss most negative power supply pin in dual-supply applications. for single-supply applications, it should be tied to gnd. 4 s1 source terminal. can be an input or output. 5 s2 source terminal. can be an input or output. 6 s3 source terminal. can be an input or output. 7 s4 source terminal. can be an input or output. 8 d drain terminal. can be an input or output. 9 s8 source terminal. can be an input or output. 10 s7 source terminal. can be an input or output. 11 s6 source terminal. can be an input or output. 12 s5 source terminal. can be an input or output. 13 v dd most positive power supply pin. 14 gnd ground (0 v) reference. 15 a2 digital input. controls the configuration of the switch, as shown in the truth table (see table 7 ). 16 a1 digital input. controls the configuration of the switch, as shown in the truth table (see table 7 ). table 6. adg709 pin function descriptions pin no. neonic description 1 a0 digital input. controls the configuration of the switch, as shown in the truth table (see table 8 ). 2 en digital input. controls the configuration of the switch, as shown in the truth table (see table 8 ). 3 v ss most negative power supply pin in dual-supply applications. for single-supply applications, it should be tied to gnd. 4 s1a source terminal. can be an input or output. 5 s2a source terminal. can be an input or output. 6 s3a source terminal. can be an input or output. 7 s4a source terminal. can be an input or output. 8 da drain terminal. can be an input or output. 9 db drain terminal. can be an input or output. 10 s4b source terminal. can be an input or output. 11 s3b source terminal. can be an input or output. 12 s2b source terminal. can be an input or output. 13 s1b source terminal. can be an input or output. 14 v dd most positive power supply pin. 15 gnd ground (0 v) reference. 16 a1 digital input. controls the configuration of the switch, as shown in the truth table (see table 8 ).
adg708/adg709 rev. c | page 11 of 20 truth tables table 7. adg708 truth table a2 a1 a0 en switch condition x 1 x 1 x x 1 0 none 0 0 0 1 1 0 0 1 1 2 0 1 0 1 3 0 1 1 1 4 1 0 0 1 5 1 0 1 1 6 1 1 0 1 7 1 1 1 1 8 1 x = dont care. table 8. adg709 truth table a1 a0 en on switch pair x 1 x 1 0 none 0 0 1 1 0 1 1 2 1 0 1 3 1 1 1 4 1 x = dont care.
adg708/adg709 rev. c | page 12 of 20 typical performance characteristics v d or v s ? drain or source voltage (v) 8 t a = 25c v ss = 0v 7 6 5 4 3 2 1 0 on resistance ( ? ) v dd = 2.7v v dd = 3.3v v dd = 4.5v v dd = 5.5v 012345 00041-005 figure 5. on resistance as a function of v d (v s ) for single supply 8 ?3.0 7 6 5 4 3 2 0 ?2.5 ?2.0 ?1.5 ?1.0 ?0.5 1.0 1.5 2.0 2.5 3.0 0.5 0 1 v dd = +2.75v v ss = ?2.75v on resistance ( ? ) v d or v s ? drain or source voltage (v) t a = 25c v dd = +2.25v v ss = ?2.25v 00041-006 figure 6. on resistance as a function of v d (v s ) for dual supply 0123 4 7 6 5 4 3 2 1 0 5 +85c +25c +125c ?40c v dd = 5v v ss = 0v 8 on resistance ( ? ) v d or v s ? drain or source voltage (v) 0 0041-007 figure 7. on resistance as a function of v d (v s ) for different temperatures, single supply +85c ?40c v dd = 3v v ss = 0v 7 6 5 4 3 2 1 0 8 0 0.5 1.0 1.5 2.0 3.0 2.5 v d or v s ? drain or source voltage (v) +25c +125c 00041-008 on resistance ( ? ) figure 8. on resistance as a function of v d (v s ) for different temperatures, single supply on resistance ( ? ) 5 4 3 2 1 0 v dd = +2.5v v ss = ?2.5v +85c ?40c +125c 6 ?2.5 ?2.0 ?1.5 ?1.0 0 0.5 1.0 1.5 2.0 ?0.5 ?2.5 v d or v s ? drain or source voltage (v) 0 0041-009 +25c figure 9. on resistance as a function of v d (v s ) for different temperatures, dual supply 012345 v s , (v d = v dd ? v s ) (v) 0.12 current (na) 0.08 0.04 0 ?0.04 ?0.08 ?0.12 i d (on) i s (off) i d (off) v dd = 5v v ss = 0v t a = 25c 00041-010 figure 10. leakage currents as a function of v d (v s )
adg708/adg709 rev. c | page 13 of 20 v d , (v s = v dd ? v d ) (v) 00.5 0.12 current (na) 1.0 1.5 2.0 3.0 0.08 0.04 0 ?0.04 ?0.08 ?0.12 2.5 v dd = 3v v ss = 0v t a = 25c i s (off) i d (on) i d (off) 0 0041-011 figure 11. leakage currents as a function of v d (v s ) ?3.0 0.12 current (na) 0.08 0.04 0 ?0.04 ?0.08 ?0.12 ?2.5 ?2.0 ?1.5 ?1.0 0 0.5 1.0 1.5 2.0 2.5 i s (off) i d (off) ?0.5 3.0 v s , (v d = v dd ? v s ) (v) i d (on), v s = v d v dd = +2.5v v ss = ?2.5v t a = 25c 0 0041-012 figure 12. leakage currents as a function of v d (v s ) 00041-013 0 0 20 40 60 80 100 120 current (na) temperature (c) 0.05 0.10 0.15 0.20 0.25 0.30 0.35 v dd = +5v v ss = 0v and v dd = +2.5v v ss = ?2.5v i d (off) i s (off) i d (on) figure 13. leakage currents as a function of temperature 00041-014 0 0 20 40 60 80 100 120 current (na) temperature (c) 0.05 0.10 0.15 0.20 0.25 0.30 0.35 v dd = +3v i d (off) i s (off) i d (on) figure 14. leakage currents as a function of temperature frequency (hz) 10m 10 current (a) 1m 100 10 1 100n 10n 1n 10m 1m 10k 100k 1k 100 t a = 25c v dd = +3v v dd = +5v v dd = +2.5v v ss = ?2.5v 0 0041-015 figure 15. supply current vs. input switching frequency frequency (hz) 0 attenuation (db) ?20 ?40 ?60 ?80 ?100 ?120 30k 100m 10m 100k 1m v dd = 5v t a = 25c 00041-016 figure 16. off isol ation vs. frequency
adg708/adg709 rev. c | page 14 of 20 frequency (hz) 0 30k attenuation (db) ?20 ?40 ?60 ?80 ?100 ?120 100m 10m 100k 1m v dd = 5v t a = 25c 0 0041-017 figure 17. crosstalk vs. frequency 100m 10m 100k 1m frequency (hz) 0 30k attenuation (db) ?5 ?10 ?15 ?20 v dd = 5v t a = 25c 00041-018 figure 18. on response vs. frequency voltage (v) ?3 20 q inj (pc) ?1 1 2 5 t a = 25c 10 0 ?10 ?20 ?40 3 ?30 4 0 ?2 v dd = +2.5v v ss = ?2.5v v dd = +3v v ss = 0v v dd = +5v v ss = 0v 00041-019 figure 19. charge injection vs. source voltage
adg708/adg709 rev. c | page 15 of 20 test circuits r on = v1/i ds v s v1 i ds d s 0 0041-020 figure 20. on resistance a 0.8v d i s (off) s1 s2 s8 en gnd v s v d v ss v dd v ss v dd 00041-021 figure 21. i s (off) v s a 0.8v d i d (off) v ss v dd v ss v dd s1 s2 s8 en gnd v d 00041-022 figure 22. i d (off) v s v ss v dd a 2.4v d i d (on) s1 s8 en gnd v d v ss v dd 00041-023 figure 23. i d (on) v ss v dd v ss v dd v s8 3v 50% t transition 90% 90% address drive (v in ) 50% 0v v s1 v out t transition a2 d * similar connection for adg709. a1 a0 en gnd adg708* s1 s8 s2 to s7 v in 2.4v 50 ? v s1 v s8 r l 300 ? c l 35pf v out 0 0041-024 figure 24. switching time of multiplexer, t transition t open 3 v 80% 80% address drive (v in ) 0v v out a2 d *similar connection for adg709. a1 a0 en gnd adg708* s1 s8 s2 to s7 v in 2.4v 50 ? v dd v dd v ss v ss v s r l 300 ? c l 35pf v out 00041-025 figure 25. break-before-make delay, t open
adg708/adg709 rev. c | page 16 of 20 output 3v 50% enable drive (v in ) 50% 0v v o t on (en) 0v 0.9v o 0.9v o t off (en) a2 d *similar connection for adg709. a1 a0 en gnd adg708* s1 s2 to s8 v in 35pf v dd v ss v dd v ss v s 300 ? r l c l v out 50 ? 0 0041-026 figure 26. enable delay, t on (en), t off (en) logic input (v in ) 3 v 0v v out q inj = c l v out a2 v out v dd d a1 a0 en gnd adg708* c l 1nf v dd s v in r s v ss v ss v s *similar connection for adg709. v out 00041-027 figure 27. charge injection v s v out 50 ? network analyzer r l 50 ? gnd s d v s off isolation = 20 log v out 0.1f v dd a2 a1 a0 en 2 .4 v 0.1f v ss v dd v ss 50 ? 00041-028 figure 28. off isolation *similar connection for adg709. v out v s a2 d a1 a0 en gnd adg708* s1 s2 s8 2.4v network analyzer network analyzer r l 50 ? v out 0.1f 0.1f v dd v ss v dd v ss 50 ? v s 50 ? 00041-029 channel-to-channel crosstalk = 20 log figure 29. channel-to-channel crosstalk
adg708/adg709 rev. c | page 17 of 20 0.1f 0.1f v s v out 50 ? network analyzer r l 50 ? gnd s d v out with switch v out without switch insertion loss = 20 log v dd a2 a1 a0 en 2.4v v ss v dd v ss 0 0041-030 figure 30. bandwidth
adg708/adg709 rev. c | page 18 of 20 terminology v dd most positive power supply potential. v ss most negative power supply in a dual-supply application. in single-supply applications, tie v ss to ground at the device. gnd ground (0 v) reference. s source terminal. can be an input or output. d drain terminal. can be an input or output. ax logic control input. en active high enable. r on ohmic resistance between d and s. r flat (on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s (off) source leakage current with the switch off. i d (off) drain leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v d (v s ) analog voltage on terminal d and terminal s. c s (off) off switch source capacitance. measured with reference to ground. c d (off) off switch drain capacitance. measured with reference to ground. c d , c s (on) on switch capacitance. measured with reference to ground. c in digital input capacitance. t transition delay time measured between the 50% and 90% points of the digital inputs and the switch on condition when switching from one address state to another. t on (en) delay time between the 50% and 90% points of the en digital input and the switch on condition. t off (en) delay time between the 50% and 90% points of the en digital input and the switch off condition. t open off time measured between the 80% points of both switches when switching from one address state to another. off isolation a measure of unwanted signal coupling through an off switch. crosstalk a measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. charge a measure of the glitch impulse transferred from injection of the digital input to the analog output during switching. bandwidth the frequency at which the output is attenuated by 3 db. on response the frequency response of the on switch. on loss the loss due to the on resistance of the switch. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. i dd positive supply current. i ss negative supply current.
adg708/adg709 rev. c | page 19 of 20 applications information power supply sequencing when using cmos devices, take care to ensure correct power supply sequencing. incorrect power supply sequencing can result in the device being subjected to stresses beyond the maximum ratings listed in figure 4 . always apply digital and analog inputs after power supplies and ground. for single-supply operation, tie v ss to gnd as close to the device as possible.
adg708/adg709 rev. c | page 20 of 20 outline dimensions 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153-ab figure 31. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters ordering guide model temperature range packag e description package option adg708bru ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708bru-reel ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708bru-reel7 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708bruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708bruz-reel 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708bruz-reel7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708cru ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708cru-reel ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708cru-reel7 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708cruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708cruz-reel 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg708cruz-reel7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709bru ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709bru-reel ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709bru-reel7 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709bruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709bruz-reel 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709bruz-reel7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709cru ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709cru-reel ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709cru-reel7 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg709cruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 ADG709CRUZ-REEL 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 ADG709CRUZ-REEL7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 1 z = rohs compliant part. ?2000C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00041-0-4/09(c)

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